XXXX_WD_TRIGGER_SCI | 1 = Watchdog counter 1 will generate SCI on time-out
0 = no SCI occurs. |
XXXX_WD_TRIGGER_NMI | 1 = Watchdog counter 1 will generate NMI on time-out
0 = no NMI occurs. |
XXXX_WD_TRIGGER_SMI | 1 = Watchdog counter 1 will generate SMI on time-out
0 = no SMI occurs. |
XXXX_WD_TRIGGER_RESET | 1 = Watchdog counter 1 will generate a hardware reset immediately on time-out. In this case WD2 serves no purpose, since its function is to delay the assertion of hardware reset from the timeout of WD1. However a valid load value for WD2 must still be supplied to the function.
0 = no hardware reset occurs now (hardware reset will still be generated upon timeout of WD2). |
XXXX_WD_WDI_ASSERT_FALLING_EDGE | 1 = WDI will retrigger the watchdog timer on a falling edge.
0 = WDI will retrigger on a rising edge. |
XXXX_WD_WDO_TRIGGERED_EARLY | 1 = output on WDO will be generated one clock cycle before counter 1 times out. In this case, WDO can be used to retrigger WDI by wiring the two signals together. This causes a bypass condition that prevents the watchdog timer from ever timing out.
0 = output on WDO will be generated when watchdog counter 1 times out (normal operation). |
XXXX_WD_ENABLE_WDI_ASSERTION | 1 = hardware trigger input WDI will retrigger watchdog timer circuit and reload counter 1. Software retrigger command may also be used.
0 = input signal WDI is disabled; only software retrigger command may be used. |
This information can also be found on page 104 of the ZFx86 Training Manual included in the \Prometheus\Docs folder on the Diamond Systems CD.
This page was last modified 10:29, 13 Feb 2004.
Copyright (c) 2004 Diamond Systems. All Rights Reserved.