DscWatchdogEnable

This function loads the watchdog counters to the specified values and configures the general behavior of watchdog counter 1, and arms the watchdog timer circuit.

Table of contents

1 Function Definition 2 Function Parameters 3 Return Value 4 Watchdog Options

Function Definition

BYTE dscWatchdogEnable(DSCB board, WORD wd1, BYTE wd2, SDWORD options);

Function Parameters

Name	Description
board	The board handle
wd1	Counter value for first watchdog timer
wd2	Counter value for second watchdog timer
options	A bitwise OR of watchdog options. See the list below.

Return Value

Error code or 0.

Watchdog Options

Each CPU has its own watchdog timer option. Below are the options for the different CPUs

Prometheus watchdog timer option

Name	Description
PROM_WD_TRIGGER_SCI	1 = Watchdog counter 1 will generate SCI on time-out 0 = No SCI occurs.
PROM_WD_TRIGGER_NMI	1 = Watchdog counter 1 will generate NMI on time-out 0 = No NMI occurs.
PROM_WD_TRIGGER_SMI	1 = Watchdog counter 1 will generate SMI on time-out 0 = No SMI occurs.
PROM_WD_TRIGGER_RESET	1 = Watchdog counter 1 will generate a hardware reset immediately on time-out. In this case WD2 serves no purpose, since its function is to delay the assertion of hardware reset from the timeout of WD1. However a valid load value for WD2 must still be supplied to the function. 0 = no hardware reset occurs now. Hardware reset will still be generated upon timeout of WD2.
PROM_WD_WDI_ASSERT_FALLING_EDGE	1 = WDI will retrigger the watchdog timer on a falling edge 0 = WDI will retrigger on a rising edge.
PROM_WD_WDO_TRIGGERED_EARLY	1 = output on WDO will be generated one clock cycle before counter 1 times out. In this case, WDO can be used to retrigger WDI by wiring the two signals together. This causes a bypass condition that prevents the watchdog timer from ever timing out. 0 = Output on WDO will be generated when watchdog counter 1 times out.
PROM_WD_ENABLE_WDI_ASSERTION	1 = hardware trigger input WDI will retrigger watchdog timer circuit and reload counter 1. Software retrigger command may also be used. 0 = input signal WDI is disabled; only software retrigger command may be used.

Athena watchdog timer option

Name	Description
ATHENA_WD_WDI_ASSERT_RISING_EDGE	1 = Watchdog will retrigger on a rising edge 0 = retrigger on falling edge.
ATHENA_WD_TRIGGER_SMI	1 = Watchdog counter 1 will generate SMI on time-out 0 = No SMI occurs.
ATHENA_WD_ENABLE_WDO	1 = Send an external pulse on WDO before trigger 0 = No pulse before trigger.
ATHENA_WD_ENABLED_WDI	1 = Send an external pulse on WDI before trigger 0 = No pulse before trigger.

Hercules watchdog timer option

Name	Description
HERC_WD_TRIGGER_NMI	1 = Watchdog counter 1 will generate NMI on time-out 0 = No NMI occurs.
HERC_WD_TRIGGER_RESET	1 = Watchdog counter WD1 will generate a hardware reset immediately on time-out. In this case WD2 serves no purpose, since its function is to delay the assertion of hardware reset from the timeout of WD1. However a valid load value for WD2 must still be supplied to the function. 0 = no hardware reset occurs now. Hardware reset will still be generated upon timeout of WD2.
HERC_WD_WDI_ASSERT_FALLING_EDGE	1 = WDI will retrigger the watchdog timer on a falling edge 0 = WDI will retrigger on a rising edge.
HERC_WD_WDO_TRIGGERED_EARLY	1 = output on WDO will be generated one clock cycle before counter 1 times out. In this case, WDO can be used to retrigger WDI by wiring the two signals together. This causes a bypass condition that prevents the watchdog timer from ever timing out. 0 = Output on WDO will be generated when watchdog counter 1 times out.
HERC_WD_ENABLE_WDI_ASSERTION	1 = hardware trigger input WDI will retrigger watchdog timer circuit and reload counter 1. Software retrigger command may also be used. 0 = input signal WDI is disabled; only software retrigger command may be used.